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Digital circuit design and simulation is performed today with a high level hardware description languages (VHDL or Verilog). A design cycle continues with the high level synthesis and technology mapping, which results in a functional equivalent circuit that can be readily implemented as a physical design. Programmable devices, especially FPGA (Field Programmable Gate Arrays) are today extensively used for prototyping implementation and hardware verification of digital circuits.

Design of a large digital system usually begins with a product requirements which evolve first into general design specification and afterwards into implementation.The technology offers different options for implementation of the design specification: general purpose microprocessors, application specific integrated circuits or heterogeneous systems made from processors and specilized HW units.

We designed several prototyping platforms based on Xilinx FPGA devices, which are used in the rapid prototyping implementation and the hardware verification process:

• Spartan3 FPGA development board: XC3S200 FPGA with CPLD/USB verification interface
• Spartan II rapid prototyping modules: XC2S200 FPGA board + I/O board + CPLD/USB interface
• EVM-02 dual FPGA prototyping modules: 2 x XC2S100 FPGA
• Tiny2 HW/SW co-design module: AVR processor ATTiny26 and XC95144 CPLD device

Embedded systems form a wide spectrum of consumer applications, especially in the field of digital telecommunications and multimedia consumer electronics.

A tipical embedded system comprises variety of hardware components, like microprocessors, microcontrollers, DSP processors, custom components and interfaces. The software part represents the functional core of the system, usualy executed within processor domain. Such systems can be implemented in "hard-wired" ASIC or in programmable logic circuits (FPGA) gaining to (re)configurability, testability and performance.

The complexity and the shortest possible time-to-market require efficient design methods in order to reduce cost and manhour. Thus, the use of automated techniques during specification, implementation and testing phases is necessary. In the past, partitioning to hardware and software parts of the design and later developing related target architecture and source code required a lot of experience to produce satisfying results. Since hardware and software had to be designed separately, necessary corrections and adaptations in early stages could lead into inefficient high-effort manual re-design. Hardware and software components of such design are generally interchangeable due to timing and cost constraints. Therefore, the automation of embedded system design plays the most important role, especially in adaptation of hardware-software partitioning. An efficient hardware-software codesign automation tool should offer highly reconfigurable high level interface between user specification and final implementation.

As the experimental platform, a high performance FPGA Altera Nios Development Board with Nios softcore processor was chosen. In order to apply the HW/SW co-design process on video and imaging algorithms, we developeded:

• an Altera Nios based prototype platform for real-time video processing
• COMET Profler tool and methodology for efficient HW/SW partitioning and integration

Digital image processing algorithms can be often efficiently implemented in hardware with parallel architectures. Hardware implementation is a preferred solution in terms of speed (image processing in real-time) and energy efficiency. The current generations of FPGA devices are a perfect target for building application specific circuits, which are designed for a specific image processing algorithm. The designer is able to change the circuit instantly by a simple reconfiguration of the FPGA device. Another advantage of using FPGA devices is hardware verification of the designed circuit, which is an order of magnitude faster comparing to a simulation. The FPGA devices can actually perform real time image processing of the video signal.

We designed a new reconfigurable system for implementation of real-time image processing circuits. The system is composed of a motherboard and up to six FPGA modules. The FPGA modules contain one or more FPGA devices and a local memory. Currently, we built modules based on Xilinx XC4008E, Spartan XCS40 and Virtex XCV100 FPGA devices. The motherboard is connected to a PC, which is used for configuration of the FPGA modules and hardware verification of the designed circuit. The reconfigurable system is connected to a video camera and a computer monitor for the real time operation of the circuit.

In recent years, there have been significant advancements in algorithms and architectures for the processing of video signals. In 1988, in response to a growing need for a common format for coding and storing digital video, ISO established the Moving Pictures Expert group (MPEG) with the mission to develop standards for the coded representation of moving pictures and audio information on digital storage media. Until now MPEG has developed more standards (MPEG1, MPEG2, MPEG4), but today most used standard is MPEG4 (DVD, digital television,…).

The MPEG4 standard requires new methodology for VLSI design. The newest way is FPGA technology. This technology has many advantages (good price/performance ratio, shorter and more flexible developing process,…). But for efficient FPGA implementation we need complexity analysis of the MPEG standard. Therefore we have developed software verification tool in Visual C++, for coding/decoding of the MPEG video stream. In this time we are working on complexity analysis of the particular algorithms which are part of the MPEG standard. We study different architectures appropriate for implementation of the MPEG4 decoder in a single FPGA device.

The increasing complexity of embedded systems is forcing industry to use standard embedded processor platforms in their products in order to speed-up the development cycle. A drawback of this approach are a lot of tradeoffs, that have to be made by a hardware designer. We are a member of Slovene Embedded Computing Team SiECT.

In cooperation with our local electronics and telecommunications industry IskraTEL Electronics and SigmaCOM, we designed a Custom Embedded Platform (CEP). The plaftorm is based on Strong ARM SA-1110 processor with integrated peripherals and ethernet controller. The CEP board is in the size of a PCMCIA card. We planned to support operating systems Windows CE, Linux and VxWorks from which two of them are already running on board.

We are also designing a PCI development board for the custom embedded platform. The development board contains a lot of peripherals (PCMCIA, USB, IrDA, Serial) a DSP processor and a PCI bridge connected to the CEP board.