############################ # On-board 100 MHz PL clk # ############################ create_clock -period 10 [get_ports clk] set_property PACKAGE_PIN Y9 [get_ports clk] set_property IOSTANDARD LVCMOS33 [get_ports clk] ############################ # SWITCHES # ############################ set_property PACKAGE_PIN F22 [get_ports {selx[0]}]; # "SW0" set_property IOSTANDARD LVCMOS33 [get_ports {selx[0]}] set_property PACKAGE_PIN G22 [get_ports {selx[1]}]; # "SW1" set_property IOSTANDARD LVCMOS33 [get_ports {selx[1]}] set_property PACKAGE_PIN H22 [get_ports {sely[0]}]; # "SW2" set_property IOSTANDARD LVCMOS33 [get_ports {sely[0]}] set_property PACKAGE_PIN F21 [get_ports {sely[1]}]; # "SW3" set_property IOSTANDARD LVCMOS33 [get_ports {sely[1]}] ############################ # VGA PORT pins # ############################ set_property PACKAGE_PIN AA19 [get_ports hsync] set_property IOSTANDARD LVCMOS33 [get_ports hsync] set_property PACKAGE_PIN Y19 [get_ports vsync] set_property IOSTANDARD LVCMOS33 [get_ports vsync] set_property PACKAGE_PIN AB20 [get_ports {rgb_o[0]}] set_property IOSTANDARD LVCMOS33 [get_ports {rgb_o[0]}] set_property PACKAGE_PIN AB19 [get_ports {rgb_o[1]}] set_property IOSTANDARD LVCMOS33 [get_ports {rgb_o[1]}] set_property PACKAGE_PIN AA22 [get_ports rgb_o[2]] set_property IOSTANDARD LVCMOS33 [get_ports rgb_o[2]] set_property PACKAGE_PIN AB21 [get_ports rgb_o[3]] set_property IOSTANDARD LVCMOS33 [get_ports rgb_o[3]] set_property PACKAGE_PIN AA21 [get_ports rgb_o[4]] set_property IOSTANDARD LVCMOS33 [get_ports rgb_o[4]] set_property PACKAGE_PIN U20 [get_ports rgb_o[5]] set_property IOSTANDARD LVCMOS33 [get_ports rgb_o[5]] set_property PACKAGE_PIN V19 [get_ports rgb_o[6]] set_property IOSTANDARD LVCMOS33 [get_ports rgb_o[6]] set_property PACKAGE_PIN V18 [get_ports rgb_o[7]] set_property IOSTANDARD LVCMOS33 [get_ports rgb_o[7]]